This invention relates to a power source system of which the power consumption is reduced by management of the power using an intermittent operation mode.
In recent years the threshold voltage of CMOS transistors has become gradually lower as the demand for higher processing speeds increases. However, lowering a threshold voltage leads to an increase in leak current in transistors during non-operation periods of the semiconductor integrated circuit.
Conventional mobile devices (particularly cellphones and the like) adopt an approach called an intermittent operation mode for extending the possible standby duration time. An intermittent operation mode is a part of the power management technology for lowering power consumption, namely an operation mode for switching between operation and nonoperation states during a short time.
For example, a cellphone intermittently receives signals at intervals of 200-800 ms. Typically, a power source voltage and a clock signal are provided for the components that address the specific tasks during signal reception, while the provision of clock signal is halted during the non-operation period.
As the leak current increases in the transistors, however, a problem arises in that the amount of stationary current cannot be small enough to be neglected or power saving cannot be attained only by stopping the supply of clock signal.
Therefore, as shown in FIG. 16, an approach has been proposed in which power is saved during the non-operation period by turning off the power supply to LSI and thereby reducing the stationary leak current.
Referring now to FIG. 16, a power source voltage conversion circuit is denoted by 10 which is capable of turning ON/OFF the output, a capacitor is denoted by 40 and a semiconductor integrated circuit (LSI) is denoted by 20. During the operation period, the power source voltage conversion circuit 10 is turned on and voltage is supplied to the LSI 20, while during the non-operation period the power source voltage conversion circuit 10 is turned off and the voltage supply to the LSI 20 is stopped. As a result, electric power can be saved since the stationary current running even during the nonoperation period of the LSI 20 can be cut.
FIG. 17 shows the waveform of an output voltage Vc supplied from the power source voltage conversion circuit 10. FIG. 17 shows an example of an operation during an intermittent operation mode. During the operation, the output voltage of the power source voltage conversion circuit 10 is driven to the operation voltage (Vc(on)) of the LSI, while during the non-operation mode the output of the power source voltage conversion circuit 10 is cut. As a result, during the non-operation period, the voltage Vc(on) gradually decreases to a ground voltage level as the stationary leak current runs in the LSI 20. However, this prior art method has the following problems.
In general, the LSI has a capacitor 40 that is referred to as a bypass capacitor. This is inserted to reduce the high frequency impedance of the power source and should have a relatively large capacitance (several xcexcF) depending on the consumption current and the noise level of the LSI.
In the structure shown in FIG. 16, all the energy stored in the capacitor 40 is consumed by the stationary leak current during the transition from the operation period to the non-operation period. Therefore, the capacitor 40 must be recharged when the circuit state changes from non-operation to operation. The average consumption current for this recharge is given by equation (1):
Ic1=CVc(on)/T,xe2x80x83xe2x80x83Equation (1)
where Ic1 is an average consumption current in the capacitor 40, C is a capacitance of the capacitor 40, vc(on) is an output voltage when the power source voltage conversion circuit 10 is ON, and T is an intermittent interval during an intermittent operation mode. If the output of the power source voltage conversion circuit 10 is turned off, the stationary leak current in the LSI 20 can be cut. However, if the intermittent interval T is short and the capacitance c of the capacitor 40 is large, the power consumption becomes large in the capacitor 40.
A solution to this problem is disclosed in Japanese Patent Laid-Open Publication No. 2000-37036A. Referring now to FIG. 18, the invention disclosed is briefly explained. In FIG. 18, reference numeral 10 denotes a power source voltage conversion circuit capable of turning ON/OFF the output, 40 a capacitor, and 20 a semiconductor integrate circuit (LSI); a diode 50 and a switch 30 are added. The same components in the figures are denoted by the same reference numerals.
During the operation of the intermittent operation mode, the output of the power source voltage conversion circuit 10 is turned on and the switch 30 is also turned on. Then the voltage Vc(on) is supplied to the LSI 20. During the non-operation period, the output of the power source voltage conversion circuit 10 is turned off and the switch 30 is also turned off. As a result, the power supply to the LSI is cut.
In this case the voltage across the terminals of the capacitor 40 is given by equation (2).
is Vc(off)=Vddxe2x88x922Vf,xe2x80x83xe2x80x83Equation (2)
where Vc(off) is an output voltage Vc during the period the power source voltage conversion circuit 10 is off, Vdd is a power source voltage supplied to the power source voltage conversion circuit 10 and Vf is a forward bias voltage of the diode 50. The voltage Vc(off) is set slightly lower (as much as xcex94V) than Vc(on) by controlling the number of steps in the diode 50.
FIG. 19 shows the waveform of the output voltage Vc supplied from the power source voltage conversion circuit 10.
FIG. 19 shows an example of an operation during the intermittent operation mode in the circuit of FIG. 18. During the operation, the output voltage of the power source voltage conversion circuit 10 is driven to the operation voltage (Vc(on)) of the LSI 20, while during the non-operation mode the output of the power source voltage conversion circuit 10 is cut. As a result, during the non-operation period, the voltage Vc gradually decreases to the voltage Vc(off) because of the leak current in the capacitor 40 and switch 30.
In this case, the average consumption current consumed in the capacitor 40 is given by an equation (3):
Ic2=Cxcex94Vc/T,xe2x80x83xe2x80x83Equation (3)
where Ic2 is an average consumption current in the capacitor 40 in FIG. 18, C is a capacitance of the capacitor 40, and xcex94 Vc is a difference between Vc(on) and Vc(off).
If the voltage difference xcex94 Vc is controlled to be almost zero, the charge/discharge current from the capacitor 40 becomes small enough to be neglected.
The power source voltage conversion circuit 10 has the function of turning On/Off (provision/non-provision of) the output voltage Vc; the method for realizing this function is briefly described below. FIG. 20 illustrates a power source voltage step-down conversion circuit, generally called a linear regulator. In the power source voltage conversion circuit 10 of the figure there is an operational amplifier 60, a reference voltage generation circuit 61, an output transistor 62, and switches (control means) 31 and 32.
During the operation of the intermittent operation mode, the operational amplifier 60 controls the gate voltage of the output transistor 62 by feedback so that an output voltage Vref of the reference voltage generation circuit 61 becomes equal to the output voltage Vc of the power source voltage conversion circuit 10.
In this case, the ground node of the operational amplifier 60 is connected to ground by the switch 32 and since the switch 31 is turned off the operational amplifier provides the output voltage Vc normally. During the non-provision period of the output voltage Vc, the switch 32 is turned off and the switch 31 is turned on. Then if the gate voltage of the output transistor 62 is set at the power source voltage Vdd, the output transistor 62 can be completely turned off.
With the provision of switches 31 and 32 the power source voltage conversion circuit 10 has the function of switching On/Off the output voltage Vc.
Although the power source system of the configuration shown in FIG. 18 works well to suppress charge/discharge current of the capacitor 40 during the intermittent operation mode, it still has the following problems.
The first problem is that the voltage Vc(off) varies depending on the power source voltage Vdd, as indicated by the aforementioned equation(2). Therefore, the effect of lowering power consumption provided by the aforementioned configuration is weakened when the above configuration is applied to a system in which the power source voltage Vdd fluctuates significantly.
The second problem is a voltage drop due to the ON-resistance in the switch 30. During the operation of the intermittent operation mode, electric current flows from the output transistor 62 of the power source voltage conversion circuit 10 to the LSI 20 via the switch 30. In this case, the voltage across the LSI 20 drops due to the ON-resistance in the switch 30.
Cellphones and other devices have the intermittent operation mode for a non-speech period and the continuous operation mode for a speech period. In general, the current running in the continuous operation mode is larger than that in the intermittent operation mode.
As a result, because the voltage drop caused by the switch 30 in the continuous operation mode becomes larger than that in the intermittent operation mode in the case of the configuration shown in FIG. 18, it is difficult to ensure the stable operation of the LSI 20.
The object of the present invention is to limit the charge/discharge current of a capacitor to a minimum during an intermittent operation mode in order to effectively reduce a power consumption and prevent a drop in an input power source voltage supplied to a driven device by isolating a switch from a current path from a power source voltage conversion circuit to a driven LSI.
To achieve the object, a capacitor for a continuous operation mode and another capacitor for an intermittent operation mode are installed in the present invention. Also, the capacitor for the continuous operation mode is cut off from the current path during the intermittent operation mode.
Namely, the power source system according to the present invention has a power source voltage conversion circuit for converting a first voltage into a second voltage, having an output node providing the second voltage and control means for controlling provision and non-provision of the second voltage, and capable of being exchanged by the control means between continuous and intermittent operation modes for continuously and intermittently providing the second voltage respectively. In addition, there is a first capacitor inserted between the output node of the power source voltage conversion circuit and ground, and a driven device powered by the second voltage supplied from the power source voltage conversion circuit. Also, there is a switching means inserted between the output node of the power source voltage conversion circuit and the first capacitor or between the first capacitor and ground.
In the above-mentioned power source system according to this invention, the switching means moves into a connection state during the continuous operation mode in which the driven device is continuously driven by the second voltage supplied from the power source voltage conversion circuit. At the same time the switching means moves into the non-connection state during the intermittent operation mode in which the driven device is intermittently driven by the second voltage supplied from the power source voltage conversion circuit.
Further, the power source system according to the present invention has a second capacitor inserted between the output node of the power source voltage conversion circuit and ground.
Still further, in the above-mentioned power source system according to the invention, the first capacitor has a large capacitance and the second capacitor has a small capacitance.
In addition, the switch is integrated with either the power source voltage conversion circuit the capacitor or the driven device in the above-mentioned power source system according to the present invention.
Then the present invention has the following effects. In a power source system which drives cellphones, for example, the first capacitor of a large capacitance is cut off by opening the switching means during the intermittent operation mode. Under this condition, the second voltage is intermittently supplied from the power source voltage conversion circuit and this converted voltage is supplied to the device to be driven. As a result, when the second voltage is provided, the charge/discharge current of the capacitor is limited to the charge/discharge current of the second capacitor. Then the power consumption is substantially lowered during the intermittent operation mode. Further, the switching means is used for connecting and disconnecting the first capacitor of a large capacitance, and this switching means is cut off from the current path between the power source voltage conversion circuit and the driven device during the intermittent operation mode. Therefore, the ON-resistance of the switch does not cause a drop in the input power source voltage, which is different from the prior case.
Further, during the continuous operation mode the switching means is closed and the first capacitor of a large capacitance is coupled with the power source system. Thus noise is reduced in the power source voltage that is provided to the driven device during the continuous operation mode.
In addition, since the major part of the power source system is integrated, the quantity of components constituting the power source system is reduced, the cost of the power source system is reduced, and the size of the device mounting area becomes smaller.